In the prior art, a high performance read/write, random access memory device such as the AMD Am9150, incorporates a set or reset feature which will switch the entire contents of the memory to a single logical value in response to control signals supplied to the chip.
The term "set" usually refers to the operation of switching the contents to a logical one; while "reset" usually refers to the operation of switching the contents to a logical zero. In this application the term "reset" will refer to either of these operations.
The prior art is typified by the 1,024.times.4 high speed static read/write RAM sold by Advanced Micro Devices, Inc., designated the Am9150. The Am9150 includes a storage matrix that is organized into four bit blocks, each bit block storing 1,024 units of data in a 64.times.16 bit array. Upon assertion of the reset control signals, the entire contents of all four bit blocks is reset to zero. Typically, a large current spike is generated upon reset when the entire array of memory units is discharged. An external bypass capacitor is typically connected to the chip socket in order to attenuate the current spike.
The functionality of the reset feature, however, is limited by the fact that the entire contents of the memory device is reset. There are applications of memory devices in which it is desirable to reset only portions of the memory device. Therefore, to increase the functionality of a memory device, a more flexible reset feature is needed.
In addition, it is desirable to minimize current surges in delicate circuits.